Low VT CMOS using doped Hf-based oxides, TaC-based Metals and Laser-only Anneal

A gate-first process was used to fabricate CMOS circuits with high performing high-K and metal gate transistors. Symmetric low V
_T
values of plusmn 0.25 V and unstrained I
_DSAT
of 1035/500 muA/mum for nMOS/pMOS at I
_OFF
=100nA/mum and |V
_DD
|=1.1 V are demonstrated on a single wafer. This was achieved using Hf-based high-k dielectrics with La (nMOS) and Al (pMOS) doping, in combination with a laser-only activation anneal to maintain band-edge EWF and minimal EOT re-growth. The laser-only anneal further results in improved L
_G
scaling of 15 nm and a 2 Aring T
_INV
reduction over the spike reference.