Run-time reconfiguration of FPGA-based drive controllers

In this contribution a field programmable gate array (FPGA) is used as target architecture to implement drive controllers. A novel concept for generic run-time switching between FPGA-based drive controllers is presented. The controller switching is done by using partial run-time hardware reconfiguration, which allows the implementation of various controllers without having to realize them all on the FPGA concurrently. It is shown that time-sharing of the FPGA resources can provide a resource-efficient implementation. A system architecture, which enables the realization of this scheme, is presented. A hard switching between controllers is implemented, for which the initial internal states of the controller to-be-loaded are computed. Experimental results show that the proposed scheme works satisfactory, opening new possibilities to the implementation of such adaptive control schemes.