A 128dB dynamic range 1kHz bandwidth stereo ADC with 114dB THD

A high performance, single die stereo delta sigma ADC is designed for high precision measurement applications. A single loop, fifth-order, thirty-three level delta-sigma analog modulator with positive and negative feedforward path is implemented. An interpolated multilevel quantizer with unevenly weighted quantization levels replaces a conventional 5-bit flash type quantizer in this design. These new techniques suppress signal dependent energy inside the delta sigma loop, reduce internal channel coupling and power consumption. Integrated with an on-chip bandgap reference circuit and decimation filter, the ADC achieves 128dB dynamic range, −114dB THD over 1kHz bandwidth. Power consumption is less than 140mW per channel.