The Effects of Angle of Incidence and Temperature on Latchup in 65 nm Technology

Single event latchup (SEL) in a 65 nm CMOS technology is examined with respect to strike angle of incidence and variations in device temperature. A significant difference in device sensitivity is observed with a change in the orientation of grazing angle strikes. The impact of an extremely high aspect ratio sensitive volume on SEL rate is discussed. It is suggested that SEL experiments should be conducted at various lateral orientations when near-grazing beam angles are tested.