Block RAM versus distributed RAM implementation of SVM Classifier on FPGA

Support Vector Machines are widely used in pattern recognition, being the newest achievements in neural network structures. This paper presents a Block RAM -based implementation example of an SVM classification function using a Spartan3 FPGA, compared versus a distributed LUT-based RAM one The number of required clock periods and the maximum clock frequency is calculated and a speed comparison of the implemented system with software running on a PC targeting the same application is also made Keywords: SVM, Block RAM, LUT-based RAM, FPGA.