FPGA Configuration by TCP/IP and Ethernet

A RAM based FPGA can be configured with a bootimage from a local proprietary flash prom, by a JTAG adapter hooked to a local PC interface or any another component, which copes with one of the FPGA configuration protocols. The development of the FPGA code as well as updates of the bootimage can be done by a JTAG adapter. On the basis of a PCB developed in the ZEL we show a first step towards an embedded JTAG adapter for TCP/IP-Ethernet.