delta -doped FET with sidewall source and drain by atomic layer epitaxy

The DC and RF performance of planar doped FET devices degrades severely due to parasitic source and drain excess resistances. The authors report a novel approach to reducing these parasitic resistances based on sidewall growth of source and drain using atomic layer epitaxy (ALE). The delta -doped structures were first etched to remove the undoped regions under the source and drain areas, followed by ALE sidewall regrowth at 450 degrees C. The regrown ALE GaAs film is 500 AA thick and has ten planes of Se atoms with equivalent carrier concentrations of 2*10/sup 19//cm/sup 3/. ALE allows the uniform regrowth of the sidewalls, since it proceeds at a monolayer/cycle irrespective of the orientation of the etched structure. The grown layer thus makes a direct contact to the channel of the delta -doped FET and reduces both R/sub s/ and R/sub D/. The performances of delta -doped FETs with the same ALE contacting layers were compared for both etched and nonetched structures. Even with nonalloyed sidewall source and drain contacts, the excess source and drain resistances were reduced by 30-40%.