Addressing Key Concerns for Implementation of Ni FUSI into Manufacturing for 45/32 nm CMOS

Key remaining concerns raised for implementation of Ni FUSI into manufacturing are addressed and solved suggesting that Ni FUSI is worthy for manufacturing. We studied NiSi, Ni
₂
Si and Ni
₃₁
Si
₁₂
FUSI gates and their showing 1) Excellent reliability (NBTI, PBTI and TDDB) on HfSiON (EOT=1.1nm), with lifetimes >10 years at 1.2 V for optimized HfSiON (BTI similar/improved compared to reference MG, strong effect of N (DPN HfSiON) finding optimal point in NMOS-PMOS BTI trade-off). 2) No Ni penetration into substrate and no additional reliability degradation with multilevel metallization BEOL thermal budget. 3) Excellent mismatch characteristics and low V
_t
variability down to L
_G
~40nm W-130 nm (no FUSI grain orientation effects), 4) Excellent EOT scalability with no PMOS VFB roll-off down to EOT-0.7 nm (Ni
₃₁
Si
₁₂
, WF-4.9 eV); 5) SRAM defectivity analysis finding main type of defects and solutions for their elimination. We also showed 6) phase formation (NiSi, Ni
₃₁
Si
₁₂
) similar to blanket films at L
_G
=30 nm.