Radiation-Tolerant High-Performance CMOS VLSI Circuit Design

Radiation-tolerant high-performance CMOS VLSI circuit design has been investigated, using γ-ray irradiation on scaled clocked CMOS/ SOS shift registers and bulk CMOS basic logic circuits. By utilizing 16-bit and 64-bit clocked CMOS shift register circuits, the usefulness of circuit design parameter optimization has been confirmed experimentally, showing the possibility of > 10 MHz operation VLSI circuits at 5 V after radiation doses in excess of 105 rads (Si). Functionality after 105 rads (Si) irradiation for shift registers with on-chip clock driver circuits has also been shown. Furthermore, radiation test results on bulk CMOS NAND and NOR circuits, into which radiatiop-hard structure NMOS transistors have been introduced, and effectiveness of this radiation-hard structure in bulk CMOS circuit designs are described. Based on the above results, radiation-tolerant high-performance CMOS VLSI circuit designs for space and nuclear plant applications are discussed.