Laser Annealed Junctions: Process Integration Sequence Optimization for Advanced CMOS Technologies

We report a record 9% improvement in pMOS performance achieved by using non-melt laser annealing followed by spike-RTA in a conventional poly-Si/SiON CMOS flow. This is the highest pMOS gain with milli-second anneal reported to date, while maintaining at the same time a 7% nMOS gain. The gain is correlated not only to poly-depletion reduction but also to significant S/D resistance lowering. The latter is obtained by switching the annealing sequence, performing laser prior to the Spike-RTA anneal. Different integration sequences and the influence of the absorbing layer on dopants activation and diffusion are investigated in detail in this study. It enables significant transistor performance and short-channel effect improvement over a Spike-RTA reference.