Oxide Islands Design for Elimination of Ultra-shallow Junction Formation

In the case of the fully depleted silicon-on-insulator (FDSOI) FET, it is a hard task for the suppression of short-channel effects (SCEs) without using the ultra-thin body type; unless some technical tricks (e.g., halo doping, threshold voltage adjustment, retrograde channel implant, ultra-shallow junction depth) are applied [1-4]. The results of previous study showed that the π-FET (quasi-SOI MOSFET with pi-shaped semiconductor conductive layer) can substantially eliminate the self-heating problem [5]. Moreover, the subthreshold properties of a π-FET are better than that of a FDSOI and similar to that of an UTBSOI. However, the characteristics depend on the source/drain (S/D) depth have not yet been analyzed. In this paper, the electrical properties of π-FET is investigated and compared to those of SOI transistors (FDSOI and UTBSOI). Based on the simulation results, the π-FET can relieve a need for ultra-shallow S/D for controlling SCEs. Also, the S/D-tied scheme can significantly ease the thermal instability resulting in better device reliability.