Design techniques for very high speed digital delta-sigma modulators aimed at all-digital RE transmitters

This paper presents a very high-speed delta-sigma modulator for achieving digital generation of radio-frequency signals. About 68 dB of ACLR (adjacent channel leakage ratio) is obtained on the 7.8 GS/s output of the delta-sigma modulator for WCDMA standard. This is achieved by using original concepts like borrow-save arithmetic, non-exact quantization and differential dynamic logic.