Modeling and Synthesis of Hardware-Software Morphing

In state of the art hardware-software-co-design flows for FPGA based systems, the hardware-software partitioning problem is solved offline, thus, omitting the great flexibility provided through partial runtime reconfiguration. The decision which functions are best suitable to be implemented in hardware or software, is typically taken with respect to the expected worst case computational demands and certain objectives like power consumption, throughput or cost. However, if these parameters change at runtime, e.g., due to environmental changes, traditional designed systems lack to adapt to the new conditions, because the hardware-software partitioning is static. In this paper we will systematically present a new methodology that allows to change the implementation style of tasks at runtime by hardware-software morphing. Based on a formal model, we will demonstrate, how morphing can be performed without loosing internal states. Moreover, we will present results from applying our methodology to a 16-tap FIR filter.