Collision-Free Interleavers Using Latin Squares for Parallel Decoding of Turbo Codes

In the parallel decoding of turbo codes, the constituent interleaver must avoid the memory collision. This paper proposes a collision-free interleaver structure which can be optimized easily over various information blocksizes. The performance of the proposed interleaver is almost the same as or 0.1dB loss against almost regular permutation (ARP) at FER 10
^-5
region with information block sizes of 320 and 640 when the simulation environment is given by the 3GPP standard turbo codes with 4 parallelism in AWGN channel.