ISPA Front End Integrated Circuit for Gamma Imaging Application

In recent works we presented the gamma
₀
, a chip expressly designed for gamma imaging application based on the ISPA tube (i.e. a vacuum sealed tube with a quartz or crystal window in which electrons, generated by the scintillating light on a photocathode, are accelerated over a 20kV potential to hit a pixelated silicon detector matrix). We now made a new version that includes new features, including a more complete test subsystem. The chip is a matrix of 1024 square pixels 135mum in side, and is designed to be bump bonded to the pin diode matrix. In each pixel, the analog part, includes a Charge Sensitive Amplifier, a shaper, a transconductance amplifier, that converts the voltage output of the shaper to a current and a discriminator. The digital part has a ten event buffer and five configuration flip flops. In this work we present the test of the device with pulses equivalent to 2000 e
^-
, that is well below the 5500 e
^-
that are given in the ISPA tube at a 20kV supply, obtaining a very clear response and a measured noise below 200 e
^-
. We will also present the tests of the integrated energy discrimination system.