Increasing Performance and Removing Bottlenecks in Reconfigurable Space Processing

In this paper we describe a new building block under development for reconfigurable systems. This block marries programmable support circuitry for reconfigurable devices and non-volatile configuration memory into an integrated and expandable building block based on BAE Systems technologies in non-volatile memories and reconfigurable support logic. We will discuss the application of this building block and its insertion into various reconfigurable processing systems. We will describe its universal applicability and internal programming. In order to adapt to the changing RAM-based FPGA configuration interfaces and broad potential application of the technology, significant portions of the reconfigurable control logic are implemented in software. This embedded software design and implementation is discussed. We discuss the flexibility, applicability across FPGA families and the savings in size and power that are being utilized through its usage. We describe a test board that allows testing of the device elements, demonstration of reconfigurable applications, connections to various interfaces both heritage such as CompactPCI and SpaceWire and new interfaces such as Rocket IO, Rapid IO or PCI Express. We discuss its usage and insertion as a Plug and Play subsystem and application to responsive space systems.