High-Performance PMOS Devices on (110)/<111'> Substrate/Channel with Multiple Stressors

A study was performed to investigate the effect of multiple stressors on CMOS devices on (110) and (100) substrates with different channel directions. For the first time, 87% I_on-I_off improvement is achieved by utilizing SiGe-S/D and compressive contact etch stop layer (c-CESL) for PMOS devices on (110) substrate with <111'> channel direction. The improvement is similar to that on conventional (100) substrate with <110> channel direction and can be explained by piezoresistive coefficients. Record PMOS device performance of I_on=900μA/μm at I_off =100nA/μm and V_DD=1.0V for 40nm gate length is demonstrated.