FPGA-based High-speed True Random Number Generator for Cryptographic Applications

Random number generator is a key primitive in cryptographic algorithms and applications. In this paper, we propose an architecture to implement a high-speed and high-quality true random number generator, which can be used as FPGA-based cryptographic hardware cores. By implementing the proposed generator in Xilinx Vertex II Pro FPGA and testing the output random bit stream using NIST and Diehard random number test suites, we prove that the proposed generator can be implemented effectively in FPGA with very high output rate and strong randomness