An Improved Power Consumption Circuit of a 5.7 GHz Variable-Gain Low Noise Amplifier (VGLNA) for RF Applications

A low voltage topology that uses a capacitively coupled resonating element has been introduced using 0.18 mum CMOS technology. The topology utilizes the decoupling scheme to dc isolate circuit elements that are connected in series and share a common dc current. A 5.7 GHz variable-gain low noise amplifier (VGLNA) is presented with simulation results exhibiting a noise figure of 1.02 dB, power gain of 19.41 dB with gain tuning range of 6 dB and IIP3 of -1.11 dBm. The power consumption reported is 12.88 mW at supply of V
_dd
= 0.7 V for power optimization circuit. Simulation results show that the proposed VGLNA has better noise performance and improved power consumption compared to the conventional cascode VGLNA