A Novel Transmit Power Control Bit Estimation Technique for FDD-UMTS Downlink

A novel transmit power control (TPC) bit estimation technique for FDD-UMTS downlink is proposed. Conventional FDD-UMTS downlink TPC bit estimation algorithm is based on coherent detection, which utilizes pilot bits for channel estimation and uses this estimate to remove the wireless channel effect on TPC bits. However, joint utilization of pilot and TPC bits can improve the detection performance as well as minimize the inherent overhead caused by excessive pilot bits usage in the transmission. In the proposed algorithm, pilot and TPC bits are used collectively for non-coherent detection of the power control command. Power increase and decrease orders are represented by two orthogonal vectors which are made up of pilot and TPC bits. TPC bit error rate (BER) performance comparisons of conventional and proposed algorithms are presented for various multi-path channels and slot formats. It is shown that in all the slot formats and different channel conditions, the proposed algorithm provides superior performances in terms of TPC bit error rate. This performance gain can go up to 15 dB at practical TPC BER (10
^-2
) with certain channel conditions and slot formats.