Q8WARE: Synthesis Tool for Network-on-Chip Applications

Setting up of an assembly line for the manufacturing of application-specific integrated circuits (ASICs) is very expensive, which may cost in the range of several hundred million dollars, and may take several manpower years. In this paper, we present Q8WARE tool, which is a small-scale version of an ASIC assembly line through the usage of Altera education FPGA board (UP2) and Verilog Q8WARE is adaptable for the manufacturing heterogeneous ASICs through the reusability of hardware modules between heterogeneous ICs. We have explored the implementation of a token ring to be used as a network-on-chip (NoC) with various protocol reconfigurations