Hierarchical Analysis of IC Artwork with User-Defined Rules

Hierarchical design rule check and component extract offer many advantages, but no single form of hierarchical analysus fits al situations. However, we will deal with hierarchical analyses which allow the user to specify how abstract representations of cells are formed, how they are checked, and how to respond if a violation is detected. This allows one analysis fits all situations. However, we will deal with hierarchical analyses which allow the user to specify how abstract representations of cells are formed, how they are checked, and how to respond if a violation is detected. This allows one analysis program (with different rules) to use the designer's hierarchy for a wide variety of analyses. Analyses that were difficult in previous schemes (cross-coupling capacitances, terminals in the center of cells, and multilayer interconnects) can now be handled hierarchically. An analysis of existing custom VLSI chips reveals how designers use hierarchy. While they commonly add geometry across hierarchical boundaries, designers rarely change the circuits of subcells-implying that hierarchical analysis is practical for a wide variery of analysis is practical for a wide variety of analyses. Cases where hiearchical analysis is not practical, limited in variety, can be handled automatically by using differemt rules depending on the cell type.