Frequency-Thermal Characterization of On-Chip Transformers With Patterned Ground Shields

Extensive studies on the performance of on-chip CMOS transformers with and without patterned ground shields (PGSs) at different temperatures are carried out in this paper. These transformers are fabricated using 0.18-mum RF CMOS processes and are designed to have either interleaved or center-tapped interleaved geometries, respectively, but with the same inner dimensions, metal track widths, track spacings, and silicon substrate. Based on the two-port S-parameters measured at different temperatures, all performance parameters of these transformers, such as frequency- and temperature-dependent maximum available gain (G
_max
), minimum noise figure (NF
_min
), quality factor (Q
₁
) of the primary or secondary coil, and power loss (P
_loss
) are characterized and compared. It is found that: 1) the values of the G
_max
and Q
₁
factor usually decrease with the temperature; however, there may be reverse temperature effects on both G
_max
and Q
₁
factor beyond certain frequency; 2) with the same geometric parameters, interleaved transformers exhibit better low-frequency performance than center-tapped interleaved transformers, whereas the center-tapped configurations possess lower values of NF
_min
at higher frequencies; and 3) with temperature rising, the degradation in performance of the interleaved transformers can be effectively compensated by the implementation of a PGS, while for center-tapped geometry, the shielding effectiveness of PGS on the performance improvement is ineffective