Comprehensive experimental investigation of gate current limitation effects on power GaAs FETs RF performances

This paper presents for the first time a detailed experimental investigation of gate current limitation effects on power GaAs FETs RF performances. This gate current limitation is entirely accomplished by dynamic compensation of the gate bias voltage. Effects of this current limitation on power added efficiency and output power performance have been examined through an extensive experimental investigation over the entire Smith chart. Comprehensive results are given and allow to determine the optimal resistor value needed for the gate current limitation. The thermal runaway problem is also taken into consideration when selecting the gate resistor.<
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