A VLSI device for low bit rate coding

The pitfalls of designing algorithms without reference to future hardware implications have been illustrated with respect to the implementation of H.261 and MPEG in VLSI systems. The wavelet transform has been shown to be better suited to hardware implementation than MPEG and H.261 by an order of magnitude and achieves higher compression ratios for a given quality. A new mapping onto a VLSI architecture of the wavelet transform is described. A single device can process images at a frame rate of over 30 QCIF frames per second (8 bit pixels) and the compressed bit stream on average 33 kbits per second at an image quality of 32 dB (PSNR).<
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