The Effect of Spatial Variations in Voltage and Temperature in Emitter Coupled Logic Systems

A set of equations is developed which predicts the effect of both spatial and temporal variations in power supply voltage and temperature. An example is given of how the equations can be used to determine the resistance ratios and power supply voltages needed to obtain the desired voltage margins for given tolerances on the resistance ratios and transistor current gain. A set of simple equations is also derived from which a zeroth order estimate of circuit performance can be easily obtained. Examples are also given of improvements that can be made in the circuit, but no analysis of the improved circuits is presented,