CMOS process uniformity evaluation through the characterisation of parasitic transistors

The design and fabrication of several families of parasitic transistors available in a standard CMOS process are discussed, and their application to process control is examined. The transistors are characterized, and their extracted parameters are correlated with those obtained from CMOS devices. From these correlations it is concluded that parasitic transistors can be used to provide a more complete picture of CMOS process variation.<
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