A real-time adaptive lattice predictor using a digital signal processor chip

A real-time adaptive lattice predictor was implemented using a digital signal processing chip. The implementation comprises input-output units, a central processing and control unit, and supporting software. The performance of the hardware was verified by comparing an input signal and the one-step prediction signal calculated by the predictor. The maximum operating frequency for the four-stage lattice structure was 13.5 kHz.<
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