A single-chip 9-32 mb/s read/write channel for disk-drive applications

This paper reports on a single-chip read/write channel for disk drive. The integrated circuit implements a peak detector architecture fully compatible with zoned-bit recording applications. The chip contains all the functions needed to implement a high performance read channel, i.e., pulse detector, programmable active filter, servo demodulator, frequency synthesizer, data separator and RLL(1,7) ENDEC. The design has been done in a way that takes full advantage of the features available in a BiCMOS technology to achieve power saving, high speed and immunity to cross-talk from digital to analog. The IC is fabricated in a 1.2 /spl mu/ BiCMOS technology and has an active area of approximately 28 mm/sup 2/. While operating from a single 5 V supply the power consumption is only 450 mW at 32 Mb/s.<
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