Schemes of dynamic redundancy for fault tolerance in random access memories

For large memory capacities, stand-by systems usually need a considerable amount of redundant hardware, not only because of the spare components, but for storing fault conditions and for carrying out the necessary reconfiguration. As alternatives, two methods of implementing fault tolerance by means of dynamic redundancy in random-access memories are proposed which allow the treatment of memory-chip faults at the interface of the memory. The memory reliability for both approaches is estimated by a simple model. These methods improve the reliability considerably compared to conventional memory fault tolerance methods, and the size of the units of reconfiguration can be tailored to the demands of the system user.<
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