A study of deep-submicron MOSFET scaling based on experiment and simulation

The scaling relationships among three fundamental quantities of deep-submicron MOSFET's, i.e., effective channel length L/sub eff/, device speed g/sub m//WC/sub ox/, and drain-induced barrier lowering (DIBL) /spl delta/V/sub t///spl delta/V/sub ds/, are investigated using both device measurements and numerical simulations. It is found that these relationships can be expressed in power-law forms with excellent statistical significance for both experimental and simulation data samples. The dependence of these scaling relationships on two sets of device parameters is also investigated experimentally and confirmed by numerical simulations. These two sets of parameters are: 1) channel parameters-gate oxide thickness t/sub ox/ threshold voltage V/sub t/, and channel doping profile; and 2) source/drain parameters-junction depth x/sub j/, parasitic resistance R/sub sd/, and junction abruptness (e.g., "halo" doping structure). In the deep-submicron regime with L/sub eff/ from 0.5 /spl mu/m down to sub-0.1 /spl mu/m, it is found that certain relationships among the three fundamental quantities are insensitive or "universal" with respect to particular subsets of device parameters. The relationship between g/sub m//WC/sub ox/ and /spl delta/V/sub t///spl delta/V/sub ds/ with L/sub eff/ as an implicit variable is found to be insensitive to t/sub ox/, V/sub t/, and channel doping profile within their respective experimental ranges. The trade-off between device performance (represented by g/sub m//WC/sub ox/) and short channel effect (represented by /spl delta/V/sub t///spl delta/V/sub ds/) is dominated by source/drain parameters x/sub j/, R/sub sd/ and junction abruptness, rather than channel parameters t/sub ox/, V/sub t/ and channel doping profile. Also, the power coefficient relating /spl delta/V/sub t///spl delta/V/sub ds/, to L/sub eff/ is found to be insensitive to t/sub ox/, V/sub t/, and channel doping.<
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