Design of flexible ASIC's including embedded processors for smart sensor applications

This paper describes work undertaken in collaboration with Southampton University and European Silicon Structures (ES2). It is the basis of a LINK project titled "ASIC Subsystems for Smart Sensors" supported by the DTI and SERC. The aims of the project are to investigate the facilities offered by the inclusion of a microprocessor core in the signal processing ASIC, to develop additional cells to support the smart sensor concept and at a higher level in the hierarchy to develop reusable system level blocks which will permit rapid redesign to meet new applications.<
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