A single CMOS SDH termination chip for 622 Mb/s STM-4C

This single CMOS SDH termination chip is intended for STM-4C. The STM-4C has 622 Mb/s data rate of the Synchronous Digital Hierarchy (SDH) is specified under ITU-TS Recommendation G.707, G.708 and G709. In this chip, a low-power 622 MHz CMOS multiplexer and demultiplexer are realized with dual-active MUX/DEMUX architecture. Extensive circuit simulation on signal and power lines of the entire chip as well as LSI package confirms chip design.<>