Device mismatch limitations on the performance of an associative memory system

The performance of an associative memory based computational engine that employs static binary memory cells and an analog Winner-Takes-All circuit depends on device matching in the various components of the system. This dependence has been analyzed, leading to design criteria for choosing optimum device sizes and chip architecture. The theoretical performance of a low power CMOS chip designed to operate in the subthreshold and transition region is compared with the actual experimental results.<
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