A single-chip public key encryption subsystem

A single-chip system capable of encryption using the Rivest, Shamir, and Adleman algorithm at rates significantly higher than other implementations is reported. The chip uses a self-timed methodology and has been implemented in a 2 mu m technology. The chip is a complete system and includes registers for the storage of keys for duplex operation. It is provided with a standard interface to a number of common microprocessors.<
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