3-dimensional stacked capacitor cell for 16 M and 64 M DRAMS

A second-generation three-dimensional stacked capacitor cell has been developed. This cell has two significant features. One is that the three-dimensional feature of the storage capacitor has been considerably enhanced by means of a fine structure. The other is that bit lines have been formed before storage capacitor formation. Either of these features will lead to the realization of 16 M DRAMs (dynamic random-access memories), and both will be necessary to realize 64 M DRAMs.<
>