Achieving uniform nMOS device power distribution for sub-micron ESD reliability

The ESD reliability of the advanced sub-micron technologies is a major concern because of the shallow LDD junctions. This paper will show that by achieving uniform power distribution during the entire ESD event in a large multi-finger nMOS device of 0.6 mu m technology, protection levels in excess of 10 kV can be realized. The evidence of this uniform power distribution resulting from the multi-finger parasitic npn turn-on is shown through an emission microscopy analysis.<
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