SOI device parameter investigation and extraction for VLSI radiation hardness modeling with SPICE

The united SOI/SOS MOSFET model adapted to SPICE is proposed for VLSI radiation hardness simulation. The procedure for MOS transistor model parameters definition using the test structures is developed. The examples of parameter extraction for irradiated SOI/SOS devices with different configurations are demonstrated. ICs operated under different doses of irradiation were modeled. The results of modeling are in good agreement with the experimental data.<
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