Technology constraints on VLSI processor implementation

It is shown that the critical path for the machine cycle time is determined by signals crossing the chip boundaries. The microarchitecture and logic design of processors integrated on VLSI must work within the technological constraints to perform optimal functionality with a machine cycle. With efficient pipeline control techniques the optimal pipeline depth can be chose to balance the maximum function per pipeline segment with the penalty of crossing the chip boundaries. The gate-density provided by automated ASICs (application-specific integrated circuits) is rapidly approaching what has so far been possible with extensive customization, but for the near future the highest gate-density still requires a full-custom approach. Advances in cost-effective integration have to extend to multichip packaging and board assembly. Efficient methods of cooling that can allow the VLSI chips to operate at lower temperatures can also give gains that are frequently ignored.<>