Sub-1-/spl mu/A dynamic reference voltage generator for battery-operated DRAMs

A new reference voltage generator with ultralow standby current of less than 1 /spl mu/A is proposed. The features are: 1) a merged scheme of threshold voltage difference generator and voltage-up converter with current mirror circuits, and 2) intermittent activation technique using self-refresh clock for the DRAM. This combination enables the average current to be reduced to 1/100 and the resistance of trimming resistor to be reduced to 1/10 compared to conventional reference voltage generators, while maintaining high accuracy and high stability. The proposed circuit was experimentally evaluated with a test device fabricated using 0.3-/spl mu/m process. An initial error of less than 4% for 6 trimming steps of the trimming resistor, temperature dependence of less than 370 ppm//spl deg/C from room temperature to 100/spl deg/C, and output noise of less than 12 mV for 1 V/sub p/spl minus/p/ V/sub cc/ bumping are achieved. These results are sufficient for achieving high-density battery operated DRAMs with low active and data-retention currents comparable to SRAMs.<
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