Efficient partitioning and analysis of digital CMOS-circuits

A library independent method for the partitioning and analysis of switch-level CMOS circuits is presented. This method is superior to the existing methods for extraction, because it is able to recognize CMOS tristate drivers connected to a bus individually. Moreover, it can improve the state-of-the-art algorithms for the determination of unidirectional signal flow, because its functional analysis is able to recognize groups of transistors which always constitute signal sources. The local functional analysis of the partitions is improved by the exclusion of impossible paths. Additionally, the recognition of fully complementary gates allows the improvement of existing algorithms for signal flow analysis.<
>