A capacitance-based method for experimental determination of metallurgical channel length of submicron LDD MOSFETs

A capacitance based method for determining L/sub met/ the metallurgical channel length of MOSFET, is proposed in this paper. This method has been extensively evaluated via two-dimensional numerical device simulation of MOSFETs with different source/drain tip and channel impurity concentration profiles as well as different gate oxide thicknesses. For all the impurity profiles tested, results demonstrated that the accuracy in extracting L/sub met/ of MOSFETs with gate oxides thinner than 100 /spl Aring/ is better than 110 /spl Aring/. This method is applicable even when there is significant source/drain reoxidation induced gate oxide thickening, as long as the gate oxide thickening is not extended into the region directly above the metallurgically defined channel region. Unlike the determination of L/sub eff/, the effective electrical channel length, from the drain current, L/sub met/ is extracted from capacitance data and the extraction is free from complications that can be introduced by incomplete removal of the resistive effects associated with contacts and the lightly doped source/drain region. Extensive measurements were performed on MOSFETs of different technologies. It is shown that the measurement is accurately repeatable and no device stressing is experienced over the required bias range. The L/sub met/ and L/sub eff/ extracted from measured capacitance and drain current data are compared. Results showed that L/sub met/ is typically 700 to 1200 /spl Aring/ shorter for submicron MOS technologies, but it tracks with L/sub eff/, i.e. a shorter L/sub met/ corresponds to a shorter L/sub eff/.<
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