A Futurebus+ central arbiter based on pairwise mutual exclusion

A scheme for building low-latency, first-come, first-served arbiters is presented. The basis of the scheme is pairwise mutual exclusion, which provides a fire wall for considerations of metastability. Cycles can occur, requiring a resolution mechanism, of which two are presented. A 14-channel, 7-ns arbiter for Futurebus+ has been fabricated in BiCMOS technology.<
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