A high performance coherent phase-locked synchronous oscillator

The authors present an optimum design approach for a 136-MHz coherent phase-locked synchronous oscillator (CPSO). They show the amplitude and phase characteristics measured with a network analyzer. A -17-dBm sweep signal was applied to the CPSO and a 5-MHz tracking bandwidth was observed. Within the tracking bandwidth, the output amplitude of the CPSO remained flat, the phase error was minimized, and the CPSO operated at its maximum noise rejection level.<
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