VLSI focal-plane array processor for morphological image processing

A full-custom mixed-signal VLSI design for high-speed morphological image processing is developed by combining a two-dimensional fine-grain parallel array architecture with on-chip focal-plane photodetectors and transmitters. An 8*8 array processor prototype chip is designed in a 1.2-mm*1.2-mm silicon area using the MOSIS 2- mu m CMOS process.<
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