Design considerations for switched-capacitor analog memories

The authors review the application of switched-capacitor analog memories in detector instrumentation for high-energy and nuclear physics experiments. They discuss the various factors which limit the performance of this type of memory, and they indicate design considerations which are important for the application of these memories in detector front-end systems at the new collider accelerators. It is shown that, in spite of its inherently simple structure, the switched-capacitor analog memory requires many design tradeoffs. The process of dimensioning the cell switch and capacitor (and choosing their relative placement) alone involves compromises between response time, accuracy, dynamic range, cell-to-cell uniformity, and silicon area.<
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