Analysis of clock jitter in switched-capacitor systems

The effect of periodic clock jitter in switched-capacitor filters is analyzed, extending a previously introduced state-space approach. This procedure facilitates the evaluation of the effects of the internally generated noise sources upon the output spectral density. This makes it possible to evaluate the sensitivity of a specific structure to its switched-capacitor and operational amplifier noise sources. The application of the results to a switched-capacitor integrator shows that the output noise level may be very sensitive to the jitter amplitude and indicates the need for high-precision clock circuitry to minimize the effects of internally generated noise on the switched capacitor filter output.<
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