32 bit GaAs HFET IEEE floating point multiplier

Presents a floating point multiplier IC fabricated in 1- mu m self-aligned gate GaAs heterostructure technology. By application of full custom layout techniques and a time-optimum architecture, the authors achieved 9.25-ns total latency IEEE single basic format multiplies with 7-W power consumption at room temperature. At 6500 gates, this implies a speed times power product of 140 fJ/gate.<
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