Two-dimensional device simulation for avalanche induced short channel effect in poly-Si TFT

A novel two-dimensional device simulator for poly-Si TFTs (thin-film transistors) is developed, in which the effects of grain boundaries (GBs) are incorporated into the carrier mobility model. In this simulator, the basic semiconductor equations are iteratively solved in combination with the carrier generation/recombination model, which consists of avalanche, S-R-H, and Auger processes. By using this simulator, the effects of GBs on device characteristics are accurately evaluated. In addition, the avalanche-induced short channel effect in poly-Si TFTs is numerically analyzed.<
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