A 4 M bit NVRAM technology using a novel stacked capacitor on selectively self-aligned FLOTOX cell structure

A novel stacked capacitor on selective self-aligned FLOTOX (SSSF) cell technology for 4-Mb nonvolatile DRAM (NV-DRAM) is described which enables a nondestructive flash store/recall (DRAM to EEPROM/EEPROM to DRAM) operation that does not disturb the original data in DRAM or EEPROM. The newly developed SSSF cell is fabricated by a triple polysilicon technology and consists of three transistors and one storage capacitor stacked on these transistors. A novel technology for the formation of a self-aligned tunnel region using selective oxide growth on the implanted region is shown together with a new self-aligned DRAM technology for storage node contact to the source. The timing diagrams in store/recall operations are also shown along with the DRAM to EEPROM data transfer characteristics.<
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